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Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

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Overview

The LCX112 is a dual J-K flip-flop. Each flip-flop has independent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q# outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input. LCX devices are designed for low voltage (3.3V or 2.5) operation with the added capability of interfacing to a 5V signal environment. The 74LCX112 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

  • This product is general usage and suitable for many different applications.
  • 5V tolerant inputs
  • 2.3V-3.6V VCC specifications provided
  • 7.5 ns tPD max (VCC = 3.3V), 10 µA ICC max
  • Power down high impedance inputs and outputs
  • ±24 mA output drive (VCC = 3.0V)
  • Implements patented noise/EMI reduction circuitry
  • Latch-up performance exceeds 500 mA
  • ESD performance: Human body model > 2000V Machine model > 2000V

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CAD Models

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Reference Price

74LCX112M

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Obsolete

CAD Model

Pb

A

H

P

SOIC-16

1

260

TUBE

960

N

Dual J-K negative edge-triggered

2

2

3.6

7.5

24

Price N/A

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74LCX112MTC

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Obsolete

CAD Model

Pb

A

H

P

TSSOP-16

1

260

TUBE

2350

N

Dual J-K negative edge-triggered

2

2

3.6

7.5

24

Price N/A

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74LCX112MTCX

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Active

CAD Model

Pb

A

H

P

TSSOP-16

1

260

REEL

2500

N

Dual J-K negative edge-triggered

2

2

3.6

7.5

24

$0.2356

More Details

74LCX112MX

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Active

CAD Model

Pb

A

H

P

SOIC-16

1

260

REEL

2500

N

Dual J-K negative edge-triggered

2

2

3.6

7.5

24

$0.5608

More Details

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