Name: Quad HCSL/ LVDS Clock Generator, 3.3 V, Crystal to 100 MHz
Brand: Quad HCSL/ LVDS Clock Generator, 3.3 V, Crystal to 100 MHz
SKU: NB3N51054

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Quad HCSL/ LVDS Clock Generator, 3.3 V, Crystal to 100 MHz

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Datasheet

CAD Model

Overview

The NB3N51054 is a precision, low phase noise clock generator that supports PCI Express requirements. The device accepts a 25 MHz fundamental mode parallel resonant crystal or a 25 MHz reference clock signal and generates four differential HCSL/ LVDS outputs at 100 MHz clock frequency with maximum skew of 40 ps. Through I2C interface, NB3N51054 provides selectable spread spectrum options of 鈭�0.35% and 鈭�0.5% for applications demanding low Electromagnetic Interface (EMI) as well as optimum performance with no spread option.

Applications

Networking
Consumer
Computing and Peripherals
Industrial Equipment
PCIe Clock Generation Gen 1, Gen 2, Gen 3 and Gen 4

End 蜜豆视频

Switch and Router
Set Top Box, LCD TV
Servers, Desktop Computers
Automated Test Equipment

Features

Spread of 鈭�0.35%, 鈭�0.5% and No Spread
Typical Phase Jitter @ 100 MHz (integrated 12 kHz to 20 MHz): 0.5 ps
Typical Cycle-cycle Jitter @ 100 MHz (10k cycles): 20 ps
Uses 25 MHz Fundamental Crystal or Reference Clock Input
Four Low Skew HCSL or LVDS Outputs
I2C Support with Read Back Capability
PCIe Gen 1, Gen 2, Gen 3, Gen 4 Jitter Compliant
Operating Supply Voltage Range 3.3 V 卤 5%
Industrial Temperature Range 鈭�40掳C to +85掳C

Material Composition

Product Change Notification

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Package Type

Case Outline

MSL Type

MSL Temp (掳C)

Container Type

Container Qty.

Input Level

Output Level

V_S Typ (V)

f_in Typ (MHz)

f_out Typ (MHz)

t_Jitter(Cy-Cy) Typ (ps)

t_Jitter(Period) Typ (ps)

t_Jitter(Φ) Typ (ps)

t_R & t_F Typ (ps)

t_R & t_F Max (ps)

T_A Min (°C)

T_A Max (°C)

Reference Price

NB3N51054DTR2G

Active

TSSOP-24

948H-01

260

REEL

2500

Crystal

LVDS

3.3

100

0.5

-40

Price N/A

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PLL Clock Generators | NB3N51054

Quad HCSL/ LVDS Clock Generator, 3.3 V, Crystal to 100 MHz

Overview

Product List

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