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Input Mux - 2:1 Differential, 2.5 V / 3.3 V, Clock / Data Fanout Buffer - 1:6 LVPECL

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Overview

The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INxb inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML, or LVDS logic levels. The NB7L585 produces six identical output copies of Clock or Data operating up to 5 GHz or 8 Gbps, respectively. As such, NB7L585 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The NB7L585 is powered with either 2.5 V or 3.3 V supply. The NB7L585 is a member of the GigaCommâ„¢ family of high performance clock products.

  • Muliplex and Fanout
  • Routers
  • ATE, Instrumentation
  • Maximum Input Data Rate > 8 Gb/s
  • Data Dependent Jitter < 15 ps
  • Maximum Input Clock Frequency > 5 GHz
  • Random Clock Jitter < 0.8 ps RMS
  • Low Skew 1:6 LVPECL Outputs, 20 ps max
  • 2:1 MultiLevel Mux Inputs
  • 175 ps Typical Propagation Delay
  • 55 ps Typical Rise and Fall Times
  • Differential LVPECL Outputs, 800 mV peaktopeak, typical
  • Internal 50-ohm Input Termination Resistors
  • VREFAC Reference Output
  • -40°C to +85°C Ambient Operating Temperature

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CAD Models

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Package Type

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MSL Temp (°C)

Container Type

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Input/Output Ratio

Channels

Input Level

Output Level

VCC Typ (V)

fMax Typ (MHz)

tJitter Typ (ps)

tskew(OO) Max (ps)

tpd Typ (ns)

Reference Price

NB7L585MNG

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Active

CAD Model

Pb

A

H

P

QFN-32

1

260

TUBE

74

Y

2:6

1

CML

ECL

2.5

7000

0.2

20

0.175

Price N/A

More Details

NB7L585MNR4G

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Active

CAD Model

Pb

A

H

P

QFN-32

1

260

REEL

1000

Y

2:6

1

ECL

ECL

3.3

7000

0.2

20

0.175

Price N/A

More Details

NB7L585MNTWG

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Active

CAD Model

Pb

A

H

P

QFN-32

1

260

REEL

1000

Y

2:6

1

LVDS

ECL

3.3

7000

0.2

20

0.175

Price N/A

More Details

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