Name: Clock Driver, 1:5 Differential, ECL / HSTL, 3.3 V / 5.0 V
Brand: Clock Driver, 1:5 Differential, ECL / HSTL, 3.3 V / 5.0 V
SKU: MC100EP14

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Clock Driver, 1:5 Differential, ECL / HSTL, 3.3 V / 5.0 V

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Overview

The MC100EP14 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single-ended (if the V_BB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions.

The EP14 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from device to device.

To ensure that the tight skew specification is realized, both sides of any differential output need to be terminated even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) without affecting skew.

The common enable (ENbar) is synchronous, outputs are enabled/disabled in the LOW state. This avoids a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The internal flip flop is locked on the falling edge of the input clock, therefore all associated specification limits are referenced to the negative edge of the clock input.

The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 uF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

Features

400 ps Typical Propagation Delay
100 ps Device-to-Device Skew
25 ps Within Device Skew
Maximum Frequency > 2 GHz Typical
The 100 Series Contains Temperature Compensation
PECL and HSTL Mode: V_CC = 3.0 V to 5.5 V with V_EE = 0 V
NECL Mode: V_CC = 0 V with V_EE = -3.0 V to -5.5 V
Open Input Default State

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Output Level

V_CC Typ (V)

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Reference Price

MC100EP14DTG

Active

TSSOP-20

9.48

260

TUBE

Buffer

2:1:5

LVDS

ECL

0.2

0.375

205

2000

Price N/A

MC100EP14DTR2G

Active

TSSOP-20

9.48

260

REEL

2500

Buffer

2:1:5

LVDS

ECL

0.2

0.375

205

2000

Price N/A

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Drivers & Fanout Buffers | MC100EP14

Clock Driver, 1:5 Differential, ECL / HSTL, 3.3 V / 5.0 V

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